176 search results - page 9 / 36 » Beyond the conventional transistor |
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the output delay of the gate. A conventional multi-input CMOS gate is designed...
AAAI
1993
13 years 8 months ago
1993
Recently several local hill-climbing procedures for propositional satisability have been proposed, which are able to solve large and di cult problems beyond the reach of conventio...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
— We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dyn...