1159 search results - page 205 / 232 » Binary Decision Graphs |
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
HASE
1998
IEEE
14 years 2 months ago
1998
IEEE
Fault trees provide a graphical and logical framework for analyzing the reliability of systems. A fault tree provides a conceptually simple modeling framework to represent the sys...
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
This paper presents a new framework for formal logic verification. What is depicted here is fundamentally different from previous approaches. In earlier approaches, the circuit is ...
DFG
2004
Springer
14 years 1 months ago
2004
Springer
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
SIGMETRICS
1995
ACM
14 years 1 months ago
1995
ACM
Synthesizing architectural requirements from an application viewpoint can help in making important architectural design decisions towards building large scale parallel machines. I...