This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
Coarse-grain multi-threshold CMOS (MTCMOS) is an effective power-gating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS power switc...
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...