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VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
14 years 7 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria
RT
2001
Springer
13 years 12 months ago
Real-Time High Dynamic Range Texture Mapping
This paper presents a technique for representing and displaying high dynamic-range texture maps (HDRTMs) using current graphics hardware. Dynamic range in real-world environments o...
Jonathan Cohen, Chris Tchou, Tim Hawkins, Paul E. ...
NSDI
2010
13 years 9 months ago
EndRE: An End-System Redundancy Elimination Service for Enterprises
In many enterprises today, WAN optimizers are being deployed in order to eliminate redundancy in network traffic and reduce WAN access costs. In this paper, we present the design ...
Bhavish Agarwal, Aditya Akella, Ashok Anand, Athul...
IPPS
2010
IEEE
13 years 5 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
13 years 11 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan