154 search results - page 6 / 31 » Black-Box Reductions in Mechanism Design |
PATMOS
2010
Springer
13 years 5 months ago
2010
Springer
In most modern processor designs the L1 data cache has become a major consumer of power due to its increasing size and high frequency access rate. In order to reduce this power con...
ETS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Concern for the increasing susceptibility of processor structures to transient errors has led to several recent research efforts that propose architectural techniques to enhance r...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
INFOCOM
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— The pre-shared key based mechanisms for Transport Layer Security (TLS) were recently standardized by the IETF to extend the set of ciphersuites by utilizing existing ke...