41 search results - page 5 / 9 » Blind Optimization for Exploiting Hardware Features |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
CHES
2000
Springer
13 years 11 months ago
2000
Springer
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...
ICRA
2010
IEEE
13 years 6 months ago
2010
IEEE
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these diffe...
ERSA
2004
13 years 8 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...