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FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 1 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
14 years 1 months ago
PipeRoute: a pipelining-aware router for FPGAs
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
Akshay Sharma, Carl Ebeling, Scott Hauck
FSTTCS
2003
Springer
14 years 1 months ago
Tagging Makes Secrecy Decidable with Unbounded Nonces as Well
Tagging schemes have been used in security protocols to ensure that the analysis of such protocols can work with messages of bounded length. When the set of nonces is bounded, this...
Ramaswamy Ramanujam, S. P. Suresh
EWSN
2010
Springer
14 years 1 months ago
Wiselib: A Generic Algorithm Library for Heterogeneous Sensor Networks
One unfortunate consequence of the success story of wireless sensor networks (WSNs) in separate research communities is an evergrowing gap between theory and practice. Even though ...
Tobias Baumgartner, Ioannis Chatzigiannakis, S&aac...
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
14 years 1 months ago
An error-correcting unordered code and hardware support for robust asynchronous global communication
A new delay-insensitive data encoding scheme for global asynchronous communication is introduced. The goal of this work is to combine the timing-robustness of delay-insensitive (i....
Melinda Y. Agyekum, Steven M. Nowick
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