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MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
14 years 1 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas
IMC
2006
ACM
14 years 1 months ago
Unexpected means of protocol inference
Network managers are inevitably called upon to associate network traffic with particular applications. Indeed, this operation is critical for a wide range of management functions...
Justin Ma, Kirill Levchenko, Christian Kreibich, S...
IMC
2006
ACM
14 years 1 months ago
Approximate fingerprinting to accelerate pattern matching
Pattern matching and analysis over network data streams is increasingly becoming an essential primitive of network monitoring systems. It is a fundamental part of most intrusion d...
Ramaswamy Ramaswamy, Lukas Kencl, Gianluca Iannacc...
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
14 years 28 days ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth
SAC
2005
ACM
14 years 27 days ago
Dynamic group communication in mobile peer-to-peer environments
This paper presents an approach to integrate publish/subscribe semantics with on-demand multicast in wireless ad hoc networks, providing dynamic group communication with fine-gra...
Eiko Yoneki, Jean Bacon