We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
In this paper we propose a new parallelization scheme for Simulated Annealing — Hierarchical Parallel SA (HPSA). This new scheme features coarse-granularity in parallelization, d...
Shiming Xu, Wenguang Chen, Weimin Zheng, Tao Wang,...
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...
In this paper we describe a time management approach to distributed agent-based simulation. We propose a new time management policy by joining optimistic synchronization techniques...
This article introduces a new load balancing algorithm, called diffusive load balancing, and compares its performance with three other load balancing algorithms: static, round rob...