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ISQED
2006
IEEE
106views Hardware» more  ISQED 2006»
14 years 2 months ago
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
ICA3PP
2005
Springer
14 years 1 months ago
Hierarchical Parallel Simulated Annealing and Its Applications
In this paper we propose a new parallelization scheme for Simulated Annealing — Hierarchical Parallel SA (HPSA). This new scheme features coarse-granularity in parallelization, d...
Shiming Xu, Wenguang Chen, Weimin Zheng, Tao Wang,...
CDES
2009
170views Hardware» more  CDES 2009»
13 years 9 months ago
Benchmarking GPU Devices with N-Body Simulations
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...
KI
2006
Springer
13 years 8 months ago
A Hybrid Time Management Approach to Agent-Based Simulation
In this paper we describe a time management approach to distributed agent-based simulation. We propose a new time management policy by joining optimistic synchronization techniques...
Dirk Pawlaszczyk, Ingo J. Timm
SIGCSE
2002
ACM
172views Education» more  SIGCSE 2002»
13 years 7 months ago
Simulation of load balancing algorithms: a comparative study
This article introduces a new load balancing algorithm, called diffusive load balancing, and compares its performance with three other load balancing algorithms: static, round rob...
Milan E. Soklic