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PATMOS
2004
Springer
14 years 1 months ago
Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
Peter Celinski, Derek Abbott, Sorin Cotofana
GLOBECOM
2008
IEEE
14 years 2 months ago
Characterizing Indoor Wireless Channels via Ray Tracing, and Validation via Measurements
Abstract—We investigate the reliability of radio channel simulators in capturing the important properties of radio channels throughout a well-specified environment. Indoor envir...
Aliye Özge Kaya, Larry J. Greenstein, Wade Tr...
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 5 months ago
Algorithms for MIS vector generation and pruning
Ignoring the effect of simultaneous switching for logic gates causes silicon failures for high performance microprocessor designs. The main reason to omit this effect is the run...
Kenneth S. Stevens, Florentin Dartu
DNA
2005
Springer
118views Bioinformatics» more  DNA 2005»
14 years 1 months ago
Molecular Learning of wDNF Formulae
We introduce a class of generalized DNF formulae called wDNF or weighted disjunctive normal form, and present a molecular algorithm that learns a wDNF formula from training example...
Byoung-Tak Zhang, Ha-Young Jang
CCL
1994
Springer
14 years 6 days ago
Application of Constraint Logic Programming for VLSI CAD Tools
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
Renate Beckmann, Ulrich Bieker, Ingolf Markhof