135 search results - page 26 / 27 » Bounded Synthesis |
COMGEO
2010
ACM
13 years 7 months ago
2010
ACM
r Numerical Abstractions6 Roberto Bagnaraa , Patricia M. Hillb , Enea Zaffanellaa aDepartment of Mathematics, University of Parma, Italy bSchool of Computing, University of Leeds, ...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Enumeration of bounded size cuts is an important step in several logic synthesis algorithms such as technology mapping and re-writing. The standard algorithm does not scale beyond...
ISPD
2009
ACM
14 years 2 months ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
ISPD
1998
ACM
13 years 11 months ago
1998
ACM
In very deep-submicron VLSI, certain manufacturing steps – notably optical exposure, resist development and etch, chemical vapor deposition and chemical-mechanical polishing (CM...
FMCAD
2000
Springer
13 years 11 months ago
2000
Springer
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...