We demonstrate how to use placement to ameliorate the predicted repeater explosion problem caused by poor interconnect scaling. We achieve repeater count reduction by dynamically ...
Brent Goplen, Prashant Saxena, Sachin S. Sapatneka...
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
Analog and mixed-signal CAD looks like a nice success story: there's been significant research in building design automation tools since the late 80's, and commercial to...
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
Abstract— This paper reviews on-going efforts towards the development of the Florida Wireless Implantable Recording Electrodes (FWIRE). The FWIRE microsystem platform is a fully ...
Rizwan Bashirullah, John G. Harris, Justin C. Sanc...