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ICES
2007
Springer
88views Hardware» more  ICES 2007»
13 years 8 months ago
Evolving and Analysing "Useful" Redundant Logic
Abstract. Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to ...
Asbjørn Djupdal, Pauline C. Haddow
TE
2010
104views more  TE 2010»
13 years 1 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
AHS
2007
IEEE
208views Hardware» more  AHS 2007»
13 years 8 months ago
Evolving Redundant Structures for Reliable Circuits - Lessons Learned
Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to the creat...
Asbjørn Djupdal, Pauline C. Haddow
ISQED
2007
IEEE
187views Hardware» more  ISQED 2007»
14 years 1 months ago
High-Frequency-Measurement-Based Frequency-Variant Transmission Line Characterization and Circuit Modeling for Accurate Signal I
Novel experimental characterization method and circuit modeling for frequency-variant transmission lines are presented. Experimental test patterns are designed and fabricated by u...
Hyunsik Kim, Yungseon Eo
CASES
2010
ACM
13 years 4 months ago
Hardware trust implications of 3-D integration
3-D circuit-level integration is a chip fabrication technique in which two or more dies are stacked and combined into a single circuit through the use of vertical electroconductiv...
Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cy...