1343 search results - page 20 / 269 » Bounded-lifetime integrated circuits |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
DAC
2005
ACM
13 years 8 months ago
2005
ACM
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
TCAD
2002
13 years 6 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...