Sciweavers

37 search results - page 7 / 8
» Bounds for Mutual Exclusion with only Processor Consistency
Sort
View
INFOCOM
2008
IEEE
14 years 1 months ago
Feasible Rate Allocation in Wireless Networks
—Rate allocation is a fundamental problem in the operation of a wireless network because of the necessity to schedule the operation of mutually interfering links between the node...
Ramakrishna Gummadi, Kyomin Jung, Devavrat Shah, R...
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
13 years 11 months ago
Compositional, efficient caches for a chip multi-processor
In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each o...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
STOC
1996
ACM
100views Algorithms» more  STOC 1996»
13 years 11 months ago
The Linear-Array Conjecture in Communication Complexity is False
A linear array network consists of k + 1 processors P0; P1; : : : ; Pk with links only between Pi and Pi+1 0 i k. It is required to compute some boolean function f x; y in this n...
Eyal Kushilevitz, Nathan Linial, Rafail Ostrovsky
NOCS
2007
IEEE
14 years 1 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
SPAA
1995
ACM
13 years 11 months ago
Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias,...