486 search results - page 27 / 98 » Branch Prediction For Free |
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
The central topic of this work is the categories of modules over unital quantales. The main categorical properties are established and a special class of operators, called Q-module...
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
—L1 instruction-cache misses pose a critical performance bottleneck in commercial server workloads. Cache access latency constraints preclude L1 instruction caches large enough t...
ARCS
2010
Springer
14 years 13 days ago
2010
Springer
Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that ...
ISCA
1999
IEEE
13 years 12 months ago
1999
IEEE
Current work in Simultaneous Multithreading provides little benefit to programs that aren't partitioned into threads. We propose Simultaneous Subordinate Microthreading (SSMT...