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ICCD
2008
IEEE
117views Hardware» more  ICCD 2008»
14 years 7 months ago
Two dimensional highly associative level-two cache design
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
Chuanjun Zhang, Bing Xue
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
14 years 5 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
PSIVT
2009
Springer
116views Multimedia» more  PSIVT 2009»
14 years 4 months ago
Video Coding Using Spatially Varying Transform
In this paper, we propose a novel algorithm, named as Spatially Varying Transform (SVT). The basic idea of SVT is that we do not restrict the transform coding inside normal block b...
Cixun Zhang, Kemal Ugur, Jani Lainema, Moncef Gabb...
DSN
2008
IEEE
14 years 4 months ago
Using likely program invariants to detect hardware errors
In the near future, hardware is expected to become increasingly vulnerable to faults due to continuously decreasing feature size. Software-level symptoms have previously been used...
Swarup Kumar Sahoo, Man-Lap Li, Pradeep Ramachandr...
IPPS
2008
IEEE
14 years 4 months ago
Reducing the run-time of MCMC programs by multithreading on SMP architectures
The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov Chain Mont...
Jonathan M. R. Byrd, Stephen A. Jarvis, A. H. Bhal...