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VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
14 years 1 months ago
A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
Sanjeev K. Jain, Pankaj Agarwal
ITC
2003
IEEE
90views Hardware» more  ITC 2003»
14 years 28 days ago
Burn-in Temperature Projections for Deep Sub-micron Technologies
Burn-in faces significant challenges in recent CMOS technologies. The self-generated heat of each IC in a burn-in environment contributes to larger currents that can lead to furth...
Oleg Semenov, Arman Vassighi, Manoj Sachdev, Ali K...