Sciweavers

66 search results - page 6 / 14
» Bus Architectures for Safety-Critical Embedded Systems
Sort
View
CSREAESA
2004
13 years 10 months ago
Link-Time Compaction of MIPS Programs
Embedded systems often have limited amounts of available memory, thus encouraging the development of compact programs. This paper presents a link-time program compactor for the emb...
Matias Madou, Bjorn De Sutter, Bruno De Bus, Ludo ...
CASES
2003
ACM
14 years 1 months ago
Encryption overhead in embedded systems and sensor network nodes: modeling and analysis
Recent research in sensor networks has raised issues of security for small embedded devices. Security concerns are motivated by the deployment of a large number of sensory devices...
Ramnath Venugopalan, Prasanth Ganesan, Pushkin Ped...
CSREAESA
2006
13 years 10 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
CASES
2005
ACM
13 years 10 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...
DAC
2003
ACM
14 years 1 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis