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DDECS
2007
IEEE
139views Hardware» more  DDECS 2007»
15 years 10 months ago
Debug Patterns for Efficient High-level SystemC Debugging
This paper proposes debug patterns combined with an intuitive flow to accelerate and simplify the debugging of SystemC designs. A debug pattern provides a formalized procedure to f...
Frank Rogin, Erhard Fehlauer, Christian Haufe, Seb...
ITC
2003
IEEE
132views Hardware» more  ITC 2003»
15 years 9 months ago
Industrial Experience with Adoption of EDT for Low-Cost Test without Concessions
This paper discusses the adoption of Embedded Deterministic Test (EDT) at Infineon Technologies as a means to reduce the cost of manufacturing test without compromising test quali...
Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muh...
ERSA
2007
174views Hardware» more  ERSA 2007»
15 years 5 months ago
High-Level Specification of Runtime Reconfigurable Designs
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...
Stephen D. Craven, Peter M. Athanas
EUROPAR
1999
Springer
15 years 8 months ago
Impact of the Head-of-Line Blocking on Parallel Computer Networks: Hardware to Applications
A fully adaptive router with hybrid bu ers at the input and output channels was designed, which improves the throughput of its input bu er counterpart by up to 40% and has only 10%...
Valentin Puente, José A. Gregorio, Cruz Izu...
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
16 years 1 months ago
Energy Characterization of Hardware-Based Data Prefetching
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Kri...