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» C Compiler Design for an Industrial Network Processor
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ANCS
2007
ACM
14 years 13 days ago
Towards high-performance flow-level packet processing on multi-core network processors
There is a growing interest in designing high-performance network devices to perform packet processing at flow level. Applications such as stateful access control, deep inspection...
Yaxuan Qi, Bo Xu, Fei He, Baohua Yang, Jianming Yu...
DAC
2005
ACM
13 years 10 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
TCAD
2008
118views more  TCAD 2008»
13 years 8 months ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
CASES
2006
ACM
14 years 2 months ago
Scalable subgraph mapping for acyclic computation accelerators
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami ...
ICCAD
2000
IEEE
115views Hardware» more  ICCAD 2000»
14 years 25 days ago
Challenges and Opportunities in Broadband and Wireless Communication Designs
Communication designs form the fastest growing segment of the semiconductor market. Both network processors and wireless chipsets have been attracting a great deal of research att...
Jan M. Rabaey, Miodrag Potkonjak, Farinaz Koushanf...