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» C Compiler Design for an Industrial Network Processor
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ANCS
2009
ACM
13 years 6 months ago
SANS: a scalable architecture for network intrusion prevention with stateful frontend
Inline stateful and deep inspection for intrusion prevention is becoming more challenging due to the increase in both the volume of network traffic and the complexity of the analy...
Fei He, Yaxuan Qi, Yibo Xue, Jun Li
FPL
2007
Springer
126views Hardware» more  FPL 2007»
14 years 2 months ago
A Time-Triggered Network-on-Chip
In this paper we propose a time-triggered network-onchip (NoC) for on-chip real-time systems. The NoC provides time predictable on- and off-chip communication, a mandatory feature...
Martin Schoeberl
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 2 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
SIGMETRICS
2008
ACM
106views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
Fully decentralized emulation of best-effort and processor sharing queues
Control of large distributed cloud-based services is a challenging problem. The Distributed Rate Limiting (DRL) paradigm was recently proposed as a mechanism for tackling this pro...
Rade Stanojevic, Robert Shorten
DDECS
2008
IEEE
227views Hardware» more  DDECS 2008»
13 years 10 months ago
Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Milos Drutarovsky, Michal Varchola