416 search results - page 7 / 84 » CMOL FPGA circuits |
FPL
2006
Springer
14 years 1 months ago
2006
Springer
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
FPGA
2005
ACM
14 years 3 months ago
2005
ACM
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
FPGA
2007
ACM
14 years 4 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
FPGA
2008
ACM
13 years 11 months ago
2008
ACM
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
FPL
2008
Springer
13 years 11 months ago
2008
Springer
A hybrid FPGA consists of island-style fine-grained units and domain-specific coarse-grained units. This paper describes an approach to estimate the power consumption of a set of ...