8 search results - page 1 / 2 » CMOS Leakage and Glitch Minimization for Power-Performance T... |
JOLPE
2006
13 years 7 months ago
2006
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Compared to subthreshold leakage, dynamic power is normally much less sensitive to the process variation due to its approximately linear relation to the process parameters. Howeve...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
TVLSI
2008
13 years 7 months ago
2008
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...
GLVLSI
2000
IEEE
14 years 23 hour ago
2000
IEEE
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...