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» CROWNE: Current Ratio Outliers with Neighbor Estimator
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DFT
2003
IEEE
86views VLSI» more  DFT 2003»
14 years 2 days ago
CROWNE: Current Ratio Outliers with Neighbor Estimator
Increased leakage and process variations make distinction between fault-free and faulty chips by IDDQ test difficult. Earlier the concept of Current Ratios (CR) was proposed to sc...
Sagar S. Sabade, D. M. H. Walker
DFT
2002
IEEE
115views VLSI» more  DFT 2002»
13 years 11 months ago
Neighbor Current Ratio (NCR): A New Metric for IDDQ Data Analysis
IDDQ test loses its effectiveness for deep sub-micron chips since it cannot distinguish between faulty and fault-free currents. The concept of current ratios, in which the ratio o...
Sagar S. Sabade, D. M. H. Walker
VTS
2003
IEEE
88views Hardware» more  VTS 2003»
14 years 2 days ago
Use of Multiple IDDQ Test Metrics for Outlier Identification
With increasing circuit complexity and reliability requirements, screening outlier chips is an increasingly important test challenge. This is especially true for IDDQ test due to ...
Sagar S. Sabade, D. M. H. Walker
MICCAI
2007
Springer
14 years 7 months ago
Outlier Rejection for Diffusion Weighted Imaging
Abstract. This paper introduces an outlier rejection and signal reconstruction method for high angular resolution diffusion weighted imaging. The approach is based on the threshold...
Carl-Fredrik Westin, Marc Niethammer, Martha Eliza...
TCSV
2010
13 years 1 months ago
Edge-Directed Error Concealment
In this paper we propose an edge-directed error concealment (EDEC) algorithm, to recover lost slices in video sequences encoded by flexible macroblock ordering. First, the strong e...
Mengyao Ma, Oscar C. Au, Shueng-Han Gary Chan, Min...