869 search results - page 112 / 174 » Cache Architectures for Reconfigurable Hardware |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
ISCA
2010
IEEE
14 years 22 days ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
IWMM
2011
Springer
12 years 10 months ago
2011
Springer
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
ECRTS
2007
IEEE
14 years 2 months ago
2007
IEEE
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
ANCS
2006
ACM
14 years 1 months ago
2006
ACM
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...