869 search results - page 114 / 174 » Cache Architectures for Reconfigurable Hardware |
TC
1998
13 years 7 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
ASPLOS
1991
ACM
13 years 11 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
CIDR
2007
13 years 9 months ago
2007
We propose a radical approach to relational query processing that aims at automatically and consistently achieving a good performance on any memory hierarchy. We believe this auto...