869 search results - page 76 / 174 » Cache Architectures for Reconfigurable Hardware |
AHS
2006
IEEE
14 years 4 months ago
2006
IEEE
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents a configurable and generic platform architecture suitable to interface several kinds of sensors for automotive applications. A platform-based design approach i...
EXPCS
2007
14 years 1 months ago
2007
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
FCCM
2009
IEEE
13 years 7 months ago
2009
IEEE
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
ASPDAC
2009
ACM
13 years 8 months ago
2009
ACM
The proliferation of Chip Multiprocessors (CMPs) has led to the integration of large on-chip caches. For scalability reasons, a large on-chip cache is often divided into smaller ba...