On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Mo...