869 search results - page 92 / 174 » Cache Architectures for Reconfigurable Hardware |
ICCD
2007
IEEE
14 years 5 months ago
2007
IEEE
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
ASAP
2009
IEEE
13 years 6 months ago
2009
IEEE
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
RTSS
2007
IEEE
14 years 3 months ago
2007
IEEE
In this paper, we propose to implement hybrid operating systems based on two-level hardware interrupts. To separate real-time and non-real-time hardware interrupts by hardware, we...
CDES
2006
13 years 10 months ago
2006
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
EUROPAR
2003
Springer
14 years 2 months ago
2003
Springer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...