243 search results - page 2 / 49 » Cache miss clustering for banked memory systems |
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
ISLPED
2004
ACM
14 years 1 months ago
2004
ACM
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
HIPEAC
2009
Springer
13 years 11 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...