Sciweavers

1873 search results - page 45 / 375
» Cache performance for multimedia applications
Sort
View
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 3 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
13 years 7 months ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
WWW
2002
ACM
14 years 9 months ago
Aliasing on the world wide web: prevalence and performance implications
Aliasing occurs in Web transactions when requests containing different URLs elicit replies containing identical data payloads. Conventional caches associate stored data with URLs ...
Terence Kelly, Jeffrey C. Mogul
STOC
2006
ACM
121views Algorithms» more  STOC 2006»
14 years 2 months ago
On adequate performance measures for paging
Memory management is a fundamental problem in computer architecture and operating systems. We consider a two-level memory system with fast, but small cache and slow, but large mai...
Konstantinos Panagiotou, Alexander Souza
ISPASS
2005
IEEE
14 years 2 months ago
On the Scalability of 1- and 2-Dimensional SIMD Extensions for Multimedia Applications
SIMD extensions are the most common technique used in current processors for multimedia computing. In order to obtain more performance for emerging applications SIMD extensions ne...
Friman Sánchez, Mauricio Alvarez, Esther Sa...