In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha...
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
TCP/IP, the most commonly used network protocol, consumes a significant portion of time in Internet servers. While a wide spectrum of studies has been done to reduce its processin...
Guangdeng Liao, Laxmi N. Bhuyan, Wei Wu, Heeyeol Y...
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
Binary Decision Diagrams BDDs are e cient at manipulating large sets in a compact manner. BDDs, however, are inefcient at utilizing the memory hierarchy of the computer. Recent ...