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JSAC
2010
13 years 8 months ago
2010
We consider the problem of coordinating a group of mobile nodes communicating through a wireless medium. The objective of the network is the alignment of all the nodes towards a c...
ISCAS
2003
IEEE
14 years 3 months ago
2003
IEEE
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
MTDT
2002
IEEE
14 years 2 months ago
2002
IEEE
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
ISCAS
2003
IEEE
14 years 3 months ago
2003
IEEE
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
DATE
2008
IEEE
14 years 4 months ago
2008
IEEE
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...