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ICASSP
2011
IEEE
13 years 1 months ago
A FPGA architecture for real-time processing of variable-length FFTS
A new FFT architecture for real-time implementation of large FFTs is presented. The architecture supports both, highthroughput and variable-length processing capabilities. The imp...
Stefan Langemeyer, Peter Pirsch, Holger Blume
PROCEDIA
2010
138views more  PROCEDIA 2010»
13 years 4 months ago
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Car...
ICDE
2007
IEEE
133views Database» more  ICDE 2007»
14 years 11 months ago
Programming Patterns for Architecture-Level Software Optimizations on Frequent Pattern Mining
One very important application in the data mining domain is frequent pattern mining. Various authors have worked on improving the efficiency of this computation, mostly focusing o...
Mingliang Wei, Changhao Jiang, Marc Snir
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
14 years 2 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus
ASPLOS
2010
ACM
14 years 4 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis