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CAL
2006
13 years 9 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
CODES
2004
IEEE
14 years 26 days ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
14 years 2 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
ECBS
2003
IEEE
111views Hardware» more  ECBS 2003»
14 years 2 months ago
Multigranular Simulation of Heterogeneous Embedded Systems
Heterogeneous embedded systems, where configurable or application specific hardware devices (FPGAs and ASICs) are used alongside traditional processors, are becoming more and more...
Aditya Agrawal, Ákos Lédeczi
CODES
1999
IEEE
14 years 1 months ago
How standards will enable hardware/software co-design
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...