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DATE
2005
IEEE
107views Hardware» more  DATE 2005»
15 years 8 months ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
FPL
2010
Springer
170views Hardware» more  FPL 2010»
15 years 13 days ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
15 years 11 months ago
MC-Sim: an efficient simulation tool for MPSoC designs
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kap...
ICANN
2005
Springer
15 years 8 months ago
High-Throughput Multi-dimensional Scaling (HiT-MDS) for cDNA-Array Expression Data
Multidimensional Scaling (MDS) is a powerful dimension reduction technique for embedding high-dimensional data into a lowdimensional target space. Thereby, the distance relationshi...
Marc Strickert, Stefan Teichmann, Nese Sreenivasul...
SPAA
2009
ACM
16 years 3 months ago
Towards transactional memory semantics for C++
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
Tatiana Shpeisman, Ali-Reza Adl-Tabatabai, Robert ...