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FDL
2008
IEEE
13 years 9 months ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae
DIMVA
2006
13 years 9 months ago
Using Type Qualifiers to Analyze Untrusted Integers and Detecting Security Flaws in C Programs
Incomplete or improper input validation is one of the major sources of security bugs in programs. While traditional approaches often focus on detecting string related buffer overfl...
Ebrima N. Ceesay, Jingmin Zhou, Michael Gertz, Kar...
RAS
2010
137views more  RAS 2010»
13 years 6 months ago
Development of complex robotic systems using the behavior-based control architecture iB2C
This paper presents a development methodology for complex robotic systems using the behavior-based control architecture iB2C (integrated Behavior-Based Control). It is shown how a...
Martin Proetzsch, Tobias Luksch, Karsten Berns
DAC
2008
ACM
14 years 8 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
DATE
2008
IEEE
155views Hardware» more  DATE 2008»
14 years 2 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...