324 search results - page 63 / 65 » Can Styles Improve Architectural Pattern Reuse |
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents an RFID based psychiatric critical to psychiatric patient treatment. The work oftracking patient tracking system in a psychiatric patient care center. In psychi...
ASPLOS
2004
ACM
14 years 2 months ago
2004
ACM
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
HPDC
1999
IEEE
14 years 26 days ago
1999
IEEE
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
SAC
2008
ACM
13 years 8 months ago
2008
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...