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ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
14 years 11 hour ago
HLS: combining statistical and symbolic simulation to guide microprocessor designs
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
Mark Oskin, Frederic T. Chong, Matthew K. Farrens
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
14 years 2 months ago
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew...
NSDI
2008
13 years 10 months ago
DieCast: Testing Distributed Systems with an Accurate Scale Model
Large-scale network services can consist of tens of thousands of machines running thousands of unique software configurations spread across hundreds of physical networks. Testing ...
Diwaker Gupta, Kashi Venkatesh Vishwanath, Amin Va...
MASCOTS
2004
13 years 9 months ago
Execution-Driven Simulation of Network Storage Systems
A number of new network storage architectures have emerged recently that provide shared, adaptable and high-performance storage systems for dataintensive applications. Three commo...
Yijian Wang, David R. Kaeli
DATE
2010
IEEE
170views Hardware» more  DATE 2010»
14 years 22 days ago
Analytical model for TDDB-based performance degradation in combinational logic
With aggressive gate oxide scaling, latent defects in the gate oxide manifest as traps that, in time, lead to gate oxide breakdown. Progressive gate oxide breakdown, also referred...
Mihir Choudhury, Vikas Chandra, Kartik Mohanram, R...