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ISLPED
2004
ACM
159views Hardware» more  ISLPED 2004»
14 years 2 months ago
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...
Ravindra Jejurikar, Rajesh K. Gupta
CODES
2003
IEEE
14 years 2 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
DAC
2003
ACM
14 years 10 months ago
Large-scale SOP minimization using decomposition and functional properties
In some cases, minimum Sum-Of-Products (SOP) expressions of Boolean functions can be derived by detecting decomposition and observing the functional properties such as unateness, ...
Alan Mishchenko, Tsutomu Sasao
GLVLSI
2005
IEEE
110views VLSI» more  GLVLSI 2005»
14 years 2 months ago
QCA channel routing with wire crossing minimization
Quantum-dot Cellular Automata (QCA) is a novel computing mechanism that can represent binary information based on spatial distribution of electron charge configuration in chemica...
Brian Stephen Smith, Sung Kyu Lim
DAC
2007
ACM
14 years 10 months ago
On-The-Fly Resolve Trace Minimization
The ability of modern SAT solvers to produce proofs of unsatisfiability for Boolean formulas has become a powerful tool for EDA applications. Proofs are generated from a resolve t...
Ohad Shacham, Karen Yorav