658 search results - page 52 / 132 » Challenges in Physical Chip Design |
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
UAL PRIVATE MACHINE ABSTRACTION WOULD ALLOW SOFTWARE POLICIES TO EXPLICITLY MANAGE MICROARCHITECTURE RESOURCES. VPM POLICIES, IMPLEMENTED PRIMARILY IN SOFTWARE, TRANSLATE APPLICATI...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Recent successes in the development and self-assembly of nanoelectronic devices suggest that the ability to manufacture dense nanofabrics is on the near horizon. However, the trem...
EMSOFT
2005
Springer
14 years 2 months ago
2005
Springer
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software. Traditional ASIC designer and software designer model ...
CODES
2000
IEEE
14 years 1 months ago
2000
IEEE
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
EDBT
2010
ACM
14 years 3 months ago
2010
ACM
In line with the insight that “one size” of databases will not fit all application needs [19], the database community is currently exploring various alternatives to commodity...