658 search results - page 58 / 132 » Challenges in Physical Chip Design |
CHES
2005
Springer
14 years 2 months ago
2005
Springer
During the last years, several masking schemes for AES have been proposed to secure hardware implementations against DPA attacks. In order to investigate the effectiveness of thes...
FPGA
2001
ACM
14 years 1 months ago
2001
ACM
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
SAC
2010
ACM
13 years 9 months ago
2010
ACM
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...