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» Challenges in Physical Chip Design
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IACR
2011
221views more  IACR 2011»
12 years 8 months ago
A Novel RFID Distance Bounding Protocol Based on Physically Unclonable Functions
Abstract. Radio Frequency Identification (RFID) systems are vulnerable to relay attacks (i.e., mafia, terrorist and distance frauds) when they are used for authentication purpose...
Süleyman Kardas, Mehmet Sabir Kiraz, Muhammed...
ASAP
2003
IEEE
108views Hardware» more  ASAP 2003»
14 years 1 months ago
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
Terry Tao Ye, Giovanni De Micheli
CODES
1999
IEEE
14 years 28 days ago
An ASIP design methodology for embedded systems
A well-known challenge during processor design is to obtain the best possible results for a typical target application domain that is generally described as a set of benchmarks. O...
Kayhan Küçükçakar
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 9 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
IUI
2000
ACM
14 years 1 months ago
Requirements elicitation for an intelligent software test environment for the physically challenged
This paper is about the elicitation of the requirements for an intelligent interface for a software test development environment that will accommodate the physically challenged (P...
Warren Moseley