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HPCA
2009
IEEE
14 years 8 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
ICS
2007
Tsinghua U.
14 years 1 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
LOCA
2005
Springer
14 years 1 months ago
The COMPASS Location System
The aim of COMPASS (short for COM mon Positioning Architecture for Several Sensors) is to realize a location infrastructure which can make use of a multitude of different sensors,...
Frank Kargl, Alexander Bernauer
DEBS
2007
ACM
13 years 9 months ago
Identification of suspicious, unknown event patterns in an event cloud
This paper describes an approach to detect unknown event patterns. In this context, an event is not only something that happens, but also something that can be analysed. This task...
Alexander Widder, Rainer von Ammon, Philippe Schae...
IMC
2009
ACM
14 years 2 months ago
Modeling user activities in a large IPTV system
Internet Protocol Television (IPTV) has emerged as a new delivery method for TV. In contrast with native broadcast in traditional cable and satellite TV system, video streams in I...
Tongqing Qiu, Zihui Ge, Seungjoon Lee, Jia Wang, J...