153 search results - page 11 / 31 » Checkbochs: Use Hardware to Check Software |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
CODES
2002
IEEE
14 years 19 days ago
2002
IEEE
This paper describes the formal verification of the recently introduced Dual Transition Petri Net (DTPN) models [12], using model checking techniques. The methodology presented a...
IOLTS
2005
IEEE
14 years 1 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
RV
2010
Springer
13 years 5 months ago
2010
Springer
A product line is a family of programs where each program is defined by a unique combination of features. Product lines, like conventional programs, can be checked for safety prope...
PEPM
2009
ACM
15 years 7 months ago
2009
ACM
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...