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    RTCSA
    2007
    IEEE
    168views Embedded Systems» more  RTCSA 2007»
    An MPSoC Performance Estimation Framework Using Transaction Level Modeling
    14 years 1 months ago
    An MPSoC Performance Estimation Framework Using Transaction Level Modeling
    Download  www.univ-valenciennes.fr
    — To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
    Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
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    SBACPAD
    2007
    IEEE
    130views Hardware» more  SBACPAD 2007»
    Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
    14 years 1 months ago
    Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
    Download  gram.eng.uci.edu
    In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
    Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh
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    TCAD
    2008
    110views more  TCAD 2008»
    A Reactive and Cycle-True IP Emulator for MPSoC Exploration
    13 years 5 months ago
    A Reactive and Cycle-True IP Emulator for MPSoC Exploration
    Download  www-micrel.deis.unibo.it
    The design of MultiProcessor Systems-on-Chip (MPSoC) emphasizes intellectual-property (IP)-based communication-centric approaches. Therefore, for the optimization of the MPSoC inte...
    Shankar Mahadevan, Federico Angiolini, Jens Spars&...
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    EDCC
    2008
    Springer
    123views Applied Computing» more  EDCC 2008»
    A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
    13 years 8 months ago
    A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
    Download  www.vmars.tuwien.ac.at
    The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
    Roman Obermaisser, Hubert Kraut, Christian El Sall...
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    DAC
    2008
    ACM
    142views Computer Architecture» more  DAC 2008»
    A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
    14 years 8 months ago
    A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
    Download  www.taktak.org
    In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
    Zhen Zhang, Alain Greiner, Sami Taktak
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