509 search results - page 62 / 102 » Chip Multi-Processor Generator |
INFOCOM
2010
IEEE
13 years 5 months ago
2010
IEEE
It is becoming apparent that the next generation IP route lookup architecture needs to achieve speeds of 100Gbps and beyond while supporting both IPv4 and IPv6 with fast real-time ...
BMCBI
2010
13 years 2 months ago
2010
Background: The brightness of the probe spots on expression microarrays intends to measure the abundance of specific mRNA targets. Probes with runs of at least three guanines (G) ...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process as IP blocks often ...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
—In today’s many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, we propose a design flow t...