509 search results - page 6 / 102 » Chip Multi-Processor Generator |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
ASAP
2007
IEEE
13 years 8 months ago
2007
IEEE
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
This paper proposes a novel O(n) Parallel Banker’s Algorithm (PBA) with a best-case run-time of O(1), reduced from an ¢¤£¦¥¨§© run-time complexity of the original Ban...