509 search results - page 78 / 102 » Chip Multi-Processor Generator |
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
ESCIENCE
2007
IEEE
14 years 2 months ago
2007
IEEE
The electronics design industry is facing major challenges as transistors continue to decrease in size. The next generation of devices will be so small that the position of indivi...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— This paper presents the design of a special purpose processor with Elliptic Curve Digital Signature Algorithm (ECDSA) functionality. This digital signature generation d...
MEMOCODE
2007
IEEE
14 years 2 months ago
2007
IEEE
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
MEMOCODE
2007
IEEE
14 years 2 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...